general description the max9321/max9321a are low-skew differentialreceiver/drivers designed for clock and data distribu- tion. the differential input can be adapted to accept a single-ended input by connecting the on-chip v bb sup- ply to an input as a reference voltage.the max9321/max9321a feature ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24ma maximum supply current, making these devices ideal for clock buffering or repeating. for interfacing to differ- ential hstl and lvpecl signals, these devices oper- ate over a +2.25v to +3.8v supply range, allowing high-performance clock and data distribution in sys- tems with a nominal +2.5v or +3.3v supply. for differ- ential lvecl operation, these devices operate from a -2.25v to -3.8v supply. multiple pinouts are provided to simplify routing across a backplane to either side of a double-sided board. both devices are offered in space-saving 8-pin sot23, so, and ?ax packages. applications precision clock bufferslow-jitter data repeaters features ? improved second source of the mc10lvep16(max9321) ? +2.25v to +3.8v differential hstl/lvpecloperation ? -2.25v to -3.8v differential lvecl operation ? low 17ma supply current ? 20ps part-to-part skew ? 172ps propagation delay ? minimum 300mv output at 3ghz ? output low for open input ? esd protection >2kv (human body model) ? on-chip reference for single-ended input ? available in thermally enhanced exposed-padso package max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers ________________________________________________________________ maxim integrated products 1 sot23 6 max/so n.c. 12 3 4 8 q 5 v ee 7 q v cc max9321 v bb d 6 d d v cc d 12 3 4 8 n.c. 5 v bb 7 q v ee q max9321 60k 60k 100k 100k 100k 100k v cc v cc v ee pin configurations 19-2152; rev 2; 11/02 ordering information * future product?ontact factory for availability. ** ep = exposed pad. part temp range pin-package top mark max9321 eka-t -40? to +85? 8 sot23-8 aalk max9321eua* -40? to +85? 8 ?ax max9321esa -40? to +85? 8 so m a x9 3 2 1 a e ka- t -40? to +85? 8 sot23-8 aaix max9321aeua* -40? to +85? 8 ?ax max9321aesa -40? to +85? 8 so-ep** for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configurations continued at end of data sheet. downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics(v cc - v ee = +2.25v to +3.8v, outputs loaded with 50 ?% to v cc - 2.0v. typical values are at v cc - v ee = +3.3v, v ihd = v cc - 1v, v ild = v cc - 1.5v, unless otherwise noted.) (notes 1?) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to v ee ..........................................................................+4.1v d or d .................................................. v ee - 0.3v to v cc + 0.3v d to d .................................................................................?.0v continuous output current .................................................50ma surge output current........................................................100ma v bb sink/source current .................................................?.6ma junction-to-ambient thermal resistance in still air 8-pin sot23.............................................................+112?/w 8-pin ?ax ..............................................................+221?/w 8-pin so-ep ...............................................................+53?/w junction-to-ambient thermal resistance with500 lfpm airflow 8-pin sot23...............................................................+78?/w 8-pin ?ax ..............................................................+155?/w 8-pin so.....................................................................+99?/w junction-to-case thermal resistance 8-pin sot23...............................................................+80?/w 8-pin ?ax ................................................................+39?/w 8-pin so.....................................................................+40?/w operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? esd protection human body model (d, d , q, q , v bb ).............................>2kv soldering temperature (10s) ...........................................+300? -40 c +25 c +85 c parameter symbol conditions min typ max min typ max min typ max units differential input (d, d ) single-endedinput high voltage v ih v bb connected to d (v il for v bb connected to d),figure 1 v cc - 1.210 v cc v cc - 1.145 v cc v cc - 1.085 v cc v single-endedinput low voltage v il v bb connected to d (v ih for v bb connected to d),figure 1 v ee v cc - 1.65 v ee v cc - 1.545 v ee v cc - 1.485 v high voltage ofdifferential input v ihd v ee + 1.2 v cc v ee + 1.2 v cc v ee + 1.2 v cc v low voltage ofdifferential input v ild v ee v cc - 0.1 v ee v cc - 0.1 v ee v cc - 0.1 v for v cc - v ee < 3.0v 0.1 v cc - v ee 0.1 v cc - v ee 0.1 v cc - v ee differentialinput voltage v ihd - v ild for v cc - v ee 3.0v 0.1 3.0 0.1 3.0 0.1 3.0 v input highcurrent i ih 150 150 150 ? d input lowcurrent i ild -10 100 -10 100 -10 100 ? d input low current i il d -150 +150 -150 +150 -150 +150 ? downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers _______________________________________________________________________________________ 3 dc electrical characteristics (continued)(v cc - v ee = +2.25v to +3.8v, outputs loaded with 50 ?% to v cc - 2.0v. typical values are at v cc - v ee = +3.3v, v ihd = v cc - 1v, v ild = v cc - 1.5v, unless otherwise noted.) (notes 1 5) ac electrical characteristics(v cc - v ee = +2.25v to +3.8v, outputs loaded with 50 ?% to v cc - 2v, input frequency = 1.5ghz, input transition time = 125ps (20% to 80%), v ihd = v ee + 1.2v to v cc , v ild = v ee to v cc - 0.15v, v ihd - v ild = 0.15v to the smaller of 3v or v cc - v ee . typical values are at v cc - v ee = 3.3v, v ihd = v cc - 1v, v ild = v cc - 1.5v, unless otherwise noted.) (notes 8, 11) -40 c +25 c +85 c parameter symbol conditions min typ max min typ max min typ max units differential output (q, q ) single-endedoutput high voltage v oh figure 1 v cc - 1.135 v cc - 0.885 v cc - 1.07 v cc - 0.82 v cc - 1.01 v cc - 0.76 v single-endedoutput low voltage v ol figure 1 v cc - 1.935 v cc - 1.685 v cc - 1.87 v cc - 1.62 v cc - 1.81 v cc - 1.56 v differentialoutput voltage v oh - v ol figure 1 550 550 550 mv reference (v bb ) referencevoltage output (note 6) v bb i bb = 0.5ma v cc - 1.55 v cc - 1.31 v cc - 1.445 v cc - 1.245 v cc - 1.385 v cc - 1.185 v power supply supply current(note 7) i ee 16 24 17 24 18 24 ma -40 c +25 c +85 c parameter symbol conditions min typ max min typ max min typ max units differentialinput-to- output delay t plhd , t phld figure 2 145 184 235 145 172 245 130 167 230 ps part-to-partskew (note 9) t skpp 25 90 20 100 20 100 ps f in = 1.5ghz, clock pattern 1.7 2.8 1.7 2.8 1.7 2.8 addedrandom jitter (note 10) t rj f in = 3.0ghz, clock pattern 0.6 1.5 0.6 1.5 0.6 1.5 ps (rms) downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers 4 _______________________________________________________________________________________ ac electrical characteristics (continued)(v cc - v ee = +2.25v to +3.8v, outputs loaded with 50 ?% to v cc - 2v, input frequency = 1.5ghz, input transition time = 125ps (20% to 80%), v ihd = v ee + 1.2v to v cc , v ild = v ee to v cc - 0.15v, v ihd - v ild = 0.15v to the smaller of 3v or v cc - v ee . typical values are at v cc - v ee = 3.3v, v ihd = v cc - 1v, v ild = v cc - 1.5v, unless otherwise noted.) (notes 8, 11) -40 c +25 c +85 c parameter symbol conditions min typ max min typ max min typ max units addeddeterministic jitter (note 10) t dj 3.0gbps2 23 -1 prbs pattern 57 80 57 80 57 80 ps (p-p) v oh - v ol 300mv, clock pattern,figure 2 3.0 3.0 3.0 switchingfrequency f max v oh - v ol 550mv, clock pattern,figure 2 2.0 2.0 2.0 ghz output rise/fall time (20% to 80%) t r , t f figure 2 50 88 120 50 89 120 50 90 120 ps note 1: guaranteed by design and characterization. note 2: measurements are made with the device in thermal equilibrium. note 3: current into a pin is defined as positive. current out of a pin is defined as negative. note 4: dc parameters production tested at t a = +25 c. guaranteed by design and characterization over the full operating temp- erature range. note 5: single-ended input operation is limited to v cc - v ee 3.0v. note 6: use v bb as a reference for inputs on the same device only. note 7: all pins open except v cc and v ee . note 8: guaranteed by design and characterization. limits are set at ? sigma. note 9: measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition . note 10: device jitter added to the input signal. downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers _______________________________________________________________________________________ 5 35 10 -15 -40 60 85 supply current, i ee vs. temperature max9321 toc01 temperature (?) supply current (ma) 15 16 17 18 14 19 20 500 2500 2000 1500 1000 0 3000 3500 output amplitude, v oh - v ol vs. frequency max9321 toc02 frequency (mhz) output amplitude (v) 0.1 0.2 0.3 0.4 0.5 0 0.9 0.8 0.7 1.0 0.6 10 -15 -40 60 35 85 transition time vs. temperature max9321 toc03 temperature (?) transition time (ps) 87 88 89 90 t r t f 1.4 1.0 3.4 3.0 2.6 2.2 1.8 3.8 propagation delay vs. high voltage of differential input, v ihd max9321 toc04 v ihd (v) propagation delay (ps) 155 160 165 170 175 180 185 150 195 200 190 t plhd t phld v ihd - v ild = 0.5v 10 -15 -40 60 35 85 propagation delay vs. temperature max9321 toc05 temperature (?) propagation delay (ps) 130 140 150120 190 200160 170 180 t plhd t phld typical operating characteristics (so packages) (v cc = +3.3v, v ee = 0, input transition time = 125ps (20% to 80%), v ihd = v cc - 1v, v ild = v cc - 1.5v, f in = 1.5ghz, outputs loaded with 50 to v cc - 2v, t a = +25 c, unless otherwise noted.) downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers 6 _______________________________________________________________________________________ pin description (max9321) pin description (max9321a) pin max/so sot23 name function 1 6 n.c. no connection 2 3 d noninverting differential input. 100k pulldown to v ee . 34 d inverting differential input. 60k pullup to v cc and 100k pulldown to v ee . 45v bb reference output voltage. connect to the inverting or noninverting input to provide areference for single-ended operation. when used, bypass with a 0.01? ceramic capacitor to v cc ; otherwise leave open. 52v ee negative supply voltage 67 q inverting output. typically terminate with 50 resistor to v cc - 2v. 7 8 q noninverting output. typically terminate with 50 resistor to v cc - 2v. 81v cc positive supply voltage. bypass from v cc to v ee with 0.1? and 0.01? ceramic capacitors. place the capacitors as close to the device as possible with the smallervalue capacitor closest to the device. pin max/so sot23 name function 1 6 n.c. no connection 23 d inverting differential input. 60k pullup to v cc and 100k pulldown to v ee . 3 4 d noninverting differential input. 100k pulldown to v ee . 45v bb reference output voltage. connect to the inverting or noninverting input to provide areference for single-ended operation. when used, bypass with a 0.01? ceramic capacitor to v cc ; otherwise leave open. 52v ee negative supply voltage 6 8 q noninverting output. typically terminate with 50 resistor to v cc - 2v. 77 q inverting output. typically terminate with 50 resistor to v cc - 2v. 81v cc positive supply voltage. bypass from v cc to v ee with 0.1? and 0.01? ceramic capacitors. place the capacitors as close to the device as possible with the smallervalue capacitor closest to the device. downloaded from: http:///
detailed description the max9321/max9321a are low-skew differentialreceiver/drivers designed for clock and data distribu- tion. for interfacing to differential hstl and lvpecl signals, these devices operate over a +2.25v to +3.8v supply range, allowing high-performance clock and data distribution in systems with a nominal +2.5v or +3.3v supply. for differential lvecl operation, these devices operate from a -2.25v to -3.8v supply. inputs the differential input can be configured to accept a sin-gle-ended input when operating at approximately v cc - v ee = 3.0v to 3.8v. this is accomplished by connect- ing the on-chip reference voltage, v bb , to an input as a reference. for example, the differential d, d input is converted to a noninverting, single-ended input by con-necting v bb to d and connecting the single-ended input to d. an inverting input is obtained by connecting v bb to d and connecting the single-ended input to d . with the differential input configured as single ended(using v bb ), the single-ended input can be driven to v cc and v ee or with a single-ended lvpecl/lvecl signal.when the differential input is configured as a single- ended input (using v bb ), the approximate supply range is v cc - v ee = 3.0v to 3.8v. this is because one of the inputs must be v ee + 1.2v or higher for proper opera- tion of the input stage. v bb must be at least v ee + 1.2v because it becomes the high-level input when the other(single-ended) input swings below it. therefore, mini- mum v bb = v ee + 1.2v. the minimum v bb output is v cc - 1.510v. substituting the minimum v bb into v bb = v ee + 1.2v results in a minimum supply of 2.71v. rounding up to a standardsupply gives the single-ended operating supply range of v cc - v ee = 3.0v to 3.8v. max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers _______________________________________________________________________________________ 7 (connected to d) v il v ih v bb v oh - v ol v oh v ol q q d d figure 1. switching with single-ended input 0 (differential) 80% 20% 80% 20% 0 (differential) v oh - v ol v ihd - v ild v ihd v ild v oh v ol q q t plhd t phld t r t f d d (q) - (q) figure 2. differential transition time and propagation delay timing diagram downloaded from: http:///
max9321/max9321a differential lvpecl/lvecl/hstl receiver/drivers 8 _______________________________________________________________________________________ when using the v bb reference output, bypass it with a 0.01? ceramic capacitor to v cc . if the v bb reference is not used, it can be left open. the v bb reference can source or sink 0.5ma. use v bb only for an input on the same device as the v bb reference. the maximum magnitude of the differential input from dto d is 3.0v or v cc - v ee , whichever is less. this limit also applies to the difference between any referencevoltage input and a single-ended input. the differential input has bias resistors that drive the output to a differential low when the inputs are open. the inverting input is biased with a 60k pullup to v cc and a 100k pulldown to v ee . the noninverting input is biased with a 100k pulldown to v ee . specifications for the high and low voltage of the differ-ential input (v ihd and v ild ) and the differential input voltage (v ihd - v ild ) apply simultaneously (v ild cannot be higher than v ihd ). outputs output levels are referenced to v cc and are consid- ered lvpecl or lvecl, depending on the level of thev cc supply. with v cc connected to a positive supply and v ee connected to gnd, the output is lvpecl. the output is lvecl when v cc is connected to gnd and v ee is connected to a negative supply. a single-ended input of at least v bb ?00mv or a differ- ential input of at least ?00mv switches the outputs tothe v oh and v ol levels specified in the dc electrical characteristics table. applications information supply bypassing bypass v cc to v ee with high-frequency surface-mount ceramic 0.1? and 0.01? capacitors in parallel asclose to the device as possible, with the 0.01? value capacitor closest to the device. use multiple parallelvias for low inductance. when using the v bb reference output, bypass it with a 0.01? ceramic capacitor tov cc (if the v bb reference is not used, it can be left open). traces input and output trace characteristics affect the perfor-mance of the max9321/max9321a. connect each sig- nal of a differential input or output to a 50 characteristic impedance trace. minimize the number ofvias to prevent impedance discontinuities. reduce reflections by maintaining the 50 characteristic impedance through connectors and across cables.reduce skew within a differential pair by matching the electrical length of the traces. the exposed-pad (ep) so package can be soldered to the pc board for enhanced thermal performance. if the ep is not soldered to the pc board, the thermal resis- tance is the same as the regular so package. the ep is connected to the chip v ee supply. be sure that the pad does not touch signal lines or other supplies. contact maxim's packaging department for guidelines on the use of ep packages. output termination terminate outputs through 50 to v cc - 2v or use an equivalent thevenin termination. when a single-endedsignal is taken from the differential output, terminate both outputs. for example, when q is used as a single- ended output, terminate both q and q . chip information transistor count: 162 6 sot23 d v cc 12 3 4 8 5 7 v ee max9321a 60k 100k 100k v cc v ee 6 max/so 12 3 4 8 5 7 max9321a d n.c.v bb q q 60k 100k 100k v cc q v ee v cc n.c. v bb d q d pin configurations (continued) downloaded from: http:///
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ______________________ 9 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. 8l, soic exp. pad.eps sot23, 8l.eps differential lvpecl/lvecl/hstl receiver/drivers max9321/max9321a package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
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